Modern chips increasingly rely on cryptography—but side-channel leakage can still undermine even “correct” implementations. Traditionally, side-channel analysis (SCA) is performed post-silicon, once hardware is available. While effective, post-silicon testing often comes late in the lifecycle, making fixes expensive, timelines tight, and risk harder to manage.
In this webinar, we’ll introduce Inspector Pre-Silicon Side-Channel Analysis, a shift-left approach that helps teams identify and quantify leakage earlier—before tape-out and lab setup constraints. We’ll start with a brief Side-Channel 101 refresher, then recap common post-silicon techniques and the pain points pre-silicon is designed to address. From there, we’ll walk through the pre-silicon methodology, what metrics it provides, and where it can be applied across the chip design lifecycle.
1. Side-channel 101
- Recap of what a side-channel is and why side-channel attacks are powerful tool in an attacker's arsenal for compromising cryptographic systems.
2. Brief overview of post-silicon testing
- Why post-silicon testing is performed, and the basic techniques employed.
- Pain points (what is the problem pre-silicon aims to solve?)
3. Value/benefits of performing side-channel testing pre-silicon
- Overview of pre-silicon methodology
- What information/metrics the analysis provides userWhen in the chip design lifecycle analysis can be applied.
- Why pre-silicon addresses the pain points of post-silicon testing
- New use cases only available with pre-silicon analysis
4. Who can benefit from pre-silicon SCA?
- Security teams
- Chip design and verification teams
- Certification schemes (ex. OCP SAFE Level 3)
- Academic researchers
5. Live Demo of Inspector Pre-Silicon SCA.
6. Conclusions and future directions